Current CMOS technologies use increasingly low supply voltages. Furthermore, for certain applications it is helpful to carry out a digital-analog conversion of a digital signal and, ultimately, to obtain a high-power analog signal.
It would therefore be useful to be able to generate an analog signal of relatively high power from a digital signal processed by a technology, for example CMOS, the supply voltage of which is low, for example one volt. This is the case notably for mobile telephony where the transmission power of the signal may satisfy specified values depending on the standard used.
Furthermore, mobile telephony on its own has many second-generation standards such as GSM and DCS 1800 in Europe, and IS-95 in the United States. There are also three third-generation standards, namely the European UMTS, the American CDMA 2000 and the Chinese TD-SCDMA. Furthermore, there are two intermediate standards between that of the second generation and that of the third generation, namely GPRS and the Edge standard. More and more mobile terminals also incorporate Bluetooth technology (IEEE 802.15.1) allowing short-range communications and Wi-Fi technology (IEEE 802.11) making it possible to access wireless local access networks (WLAN).
The production of a terminal, such as a mobile telephone, compatible with these various standards nowadays involves the production of several different radio frequency chips. It is therefore currently envisaged to use circuits capable of adapting to several transmission standards while keeping the same hardware infrastructure.
In an attempt to achieve this objective, approaches involve increasing the volume of the digital portion of the transmission chain relative to that of the analog portion which is more difficult to reconfigure.
Therefore, a first approach that has been envisaged includes processing the “baseband” and “intermediate frequency” portion of the transmission chain in a digital manner. This approach moves in the direction of a certain flexibility of the system.
Furthermore, the advances in submicron CMOS technologies now make it possible to achieve high working frequencies. Also, prior theoretical approaches have envisaged a greater digitization of the transmission chain, notably incorporating frequency transposition digital processes to reach the radio frequency domain.
There is therefore currently a desire, in the context of development of “Software Defined Radio” (SDR), that is to say radio that can be reconfigured, to retain flexibility at the digital/analog interface and at the power amplifier.